Limits of Dennard scaling, transistor scaling and instruction-level parallelism have slowed CPU performance gains.

Judge as of 2024-06-14. True if computer architecture literature (e.g. Hennessy & Patterson, SPEC trend data, industry analyses) shows that the end of Dennard scaling, the slowdown of transistor scaling, and diminishing returns from instruction-level parallelism have together slowed gains in single-thread CPU performance compared with historical rates. Mostly true if the slowdown is well documented and two of the three causes are clearly supported, with the third only weakly linked. Mixed if only one cause is well supported. Mostly false if CPU gains slowed for mainly other reasons. False if CPU performance growth has not slowed.

Set before the research began.

1. E1 ISCA 2018 Turing Lecture: A New Golden Age for Computer Architecture (Hennessy and Patterson) ISCA 2018 (International Symposium on Computer Architecture) · June 2018

   “The ending of Dennard Scaling and Moore’s Law also slowed this path; single core performance improved only 3% last year!”

2. E2 PerformanceAnalysisAndTuningOnModernCPUs_SecondEdition Scribd (copy of a performance-engineering textbook on modern CPUs)

   “From 1990 to 2000, single-threaded performance on SPECint benchmarks increased by a factor of approximately 25 to 30, driven largely by higher CPU frequencies and improved microarchitecture.”

3. E3 Drivers of Microprocessor Performance Growth: A Review of Quantitative Decomposition Studies Proceedings of CONF-SEML 2026 Symposium (Applied and Engineering Sciences, ACE) · 2026

   “single-threaded performance stagnates as the issue width further increases [3].”

4. E4 After Moore's Law, Performance Becomes a Software Problem Wevolver · 22 October 2026

   “Between 1986 and about 2002, instruction-level parallelism together with faster transistors produced annual performance improvements of approximately 50%.”

In their 2018 Turing Lecture (E1), Hennessy and Patterson say the end of Dennard scaling and of Moore's Law (transistor scaling) slowed single-core performance, which improved only 3% in the previous year. E4 says instruction-level parallelism and faster transistors gave about 50% annual gains between 1986 and about 2002. E3 reports that single-threaded performance stops improving as issue width grows, which shows diminishing returns from instruction-level parallelism. Together these sources support all three causes and a slowdown compared with historical rates, so the claim resolves true.